http://www.bing.com:80/search?q=Phy+Sic+LeacturesSearch resultshttp://www.bing.com:80/s/a/rsslogo.gifhttp://www.bing.com:80/search?q=Phy+Sic+LeacturesCopyright © 2026 Microsoft. All rights reserved. These XML results may not be used, reproduced or transmitted in any manner or for any purpose other than rendering Bing results within an RSS aggregator for your personal, non-commercial use. Any other use of these results requires express written permission from Microsoft Corporation. By accessing this web page or using these results in any manner whatsoever, you agree to be bound by the foregoing restrictions.https://electronics.stackexchange.com/questions/591329/what-does-phy-refer-toa PHY is a type of Ethernet physical layer (eg. 100BASE-TX, 10BASE-T) a PHY is an Ethernet transceiver IC (eg. an IC that converts 100BASE-TX to MII/RMII) a PHY is a physical layer device (more than just the transceiver IC) Is PHY ambiguous and can refer to all of these or did I understand something wrong?Thu, 23 Apr 2026 21:13:00 GMThttps://electronics.stackexchange.com/questions/646531/why-are-ethernet-mac-and-phy-separateThe PHY also dissipates a significant amount of power all by itself. And sometimes different media require different PHYs, but the MAC can be the same. For all of these reasons, it makes sense to keep it as a separate chip. That said, there are some chips targeted for embedded applications that include both. Wiznet, for one, has products in ...Fri, 24 Apr 2026 03:32:00 GMThttps://electronics.stackexchange.com/questions/75596/what-is-the-difference-between-phy-and-mac-chipwhat is the difference between PHY and MAC chip Ask Question Asked 12 years, 9 months ago Modified 12 years, 9 months agoSat, 25 Apr 2026 09:58:00 GMThttps://electronics.stackexchange.com/questions/631104/connecting-a-phy-to-another-phy-on-a-same-boardGenerally, if I'm connecting a PHY to RJ45 connector, I would add center tap capacitors and Bob-Smith termination like below. But if I am connecting a PHY to another PHY, do I still need the Bob-Smith termination? Or can I just have center tap capacitors on both sides like below? Both PHYs share same GND but are powered by different rails.Thu, 23 Apr 2026 00:06:00 GMThttps://electronics.stackexchange.com/questions/754244/how-to-implement-otg-fs-hardware-using-embedded-phy-on-stm32f105-107-microcontroThe OTG FS for STM32F105/107 (which does not support OTG HS 4) has an internal PHY 5 and a pull-up resistor; thus, I attempted to use section 3.3 of AN4879. Regarding the figure that is presented below: • The OTG specification requires the use of a capacitor (maximum value 4.7 μF) on VBUS.Tue, 21 Apr 2026 13:58:00 GMThttps://electronics.stackexchange.com/questions/701119/clock-synchronization-in-ethernet-phyI am beginning to start with ethernet PHY. As per my understanding, digital signal will be transmitted and we apply encoding scheme to incorporate clock information into the data signal. Can't we j...Wed, 22 Apr 2026 22:26:00 GMThttps://electronics.stackexchange.com/questions/62387/in-usb-what-is-the-difference-between-a-phy-and-a-transceiverA Phy is similar to a transceiver in that there is usually different signal standards on "both sides of the chip". With Ethernet it is MII/GMII/etc on one side and, well, Ethernet on the other.Fri, 24 Apr 2026 01:09:00 GMThttps://electronics.stackexchange.com/questions/698761/ethernet-phy-and-their-corresponding-hardware-are-represented-right-to-left-in-mPHY->RJ45 The magnetics also, are always shown on the left of the port, and their pin order, packaging, and the way they are drawn implies that the port is going to be on their right following the PHY->RJ45 convention.Mon, 20 Apr 2026 15:04:00 GMThttps://electronics.stackexchange.com/questions/653389/phy-address-for-spi-interfaceThe "PHY address" you refer to is an bus address. MDIO is a management interface between a MAC and one or more PHYs. In the case of the W5500, the MAC and PHY are integrated in the chip. Refer to the (green lines added by me): So there's no need for an external management interface, or for PHYAD pins.Sun, 19 Apr 2026 19:52:00 GMThttps://electronics.stackexchange.com/questions/667753/why-do-ethernet-phy-magnetics-have-a-center-tapI've a question with the Ethernet PHY connection to the RJ45 connector. With either discrete or integrated magnetics, either with voltage mode PHY or current mode PHY, what is the purpose of the ce...Mon, 20 Apr 2026 04:34:00 GMT